Several Digital IP cores are available and are optimized for high performance and low power such as IoT security algorithms, several communication standards blocks, NoC routers and interfaces, and NoC-based FPGA. These IPs are available either soft (HDL code), generic, or hard (gds2) formats.
Low power tiny area IoT hardware security modules.
The IPVLPIOTRAES30 soft IP and as a hard ASIC IP.
The IPVLPIOTRACRON80 soft IP is intended to be used in Xilinx FPGA kits (Series 7) as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 80Mbps throughput with power consumption of […]
The IPVLPSVM300 soft IP is intended to be used in Xilinx FPGA kits (Series 7) as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 300Mbps throughput with power consumption of 2.1mW […]