The IPVADC10BIT130 is a low-power 10-bit Successive
Approximation Register (SAR) ADC IP with a sampling
rate up to 30MS/s. The SAR algorithm uses a new SAR
algorithm that depends on our novel continuous disassembly
algorithm.

Low power tiny area IoT hardware security modules.

The IPVLPIOTRAES30 soft IP and as a hard ASIC IP.

The IPVTADC6BIT65 is a lo w-power 6-bit Time-Interleaved Time Based ADC IP with a sampling rate up to 8GS/s.

Considering a sampling rate of 8GS/s, a 1GHz input frequency and an input range of 0.9Vpp, this 6-bit ADC features an outstanding dynamic performance that includes 35.2 dB SNDR and 5.7-bit ENOB.

The IPVLPIOTRACRON80 soft IP is intended to be used in Xilinx FPGA kits (Series 7) as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries.   The hard ASIC IP provides up to 80Mbps throughput with  power consumption of […]

The IPVLPSVM300 soft IP is intended to be used in Xilinx FPGA kits (Series 7) as an RTL optimized code. In addition, it is available as a hard ASIC IP which can be cost-effectively ported across process nodes and technology foundries. The hard ASIC IP provides up to 300Mbps throughput with  power consumption of 2.1mW […]